As for WP5, WP4 perfectly illustrates the diversity of integrated photonics uses. In this WP4 the contributors will create photonic circuits (PICs) which will mainly use the PIC100 platform, but some will be on more exploratory technological bases within the framework of PIC200 and non-silicon technologies activities. The objective of this task is to identify the requirements in term of process developments to achieve the circuit design tasks. The output of this Task will be then used by Task 2.3 as additional input to define the requirements for the technologies.

A first subtask, led by THALES, will be focused on "PIC100 circuit designs". Although the technology will be mature, the PICs developed in the framework of STARLight project will explore different use cases making them relevant beta testers in particular for the design environment.

The second subtask, led by ALMAE, will address "Path Finding to PIC200 circuits design". Here the technological platform is far from being mature and various approaches will be used for the different demonstrators. The PIC specifications work will be very critical to assure an accurate matching with the WP3 developments. The third task, led by ANSYS, is dedicated to the photonics tools: simulation & CAD solutions on one side and device/PIC characterization & measurement on the other side. In the case the specification work will be done mostly with respect to the designer needs within the WP4 and with the WP5.

The fourth task, led by SICOYA, is on the packaging & assembly. It is a critical part for which the specification work will link the end user for WP5 and WP4 to the technology provider from WP1. As this work is related most of the time to the final step of the overall fabrication process, it must be carefully done to avoid major incompatibility. Material sustainability, reparability and reliability on final users' side will be major subjects here.

The last task, led by STM, is on Electronic Integrated Circuit (EIC) Development. These circuits will be either done on silicon BiCMOS technology or on InP HBT process. In both cases the link with the PIC design is critical to address the targeted data rate. Out of the WP4, dependencies with the PIC development of WP3 have to be considered in a STCO/DTCO (system technology co optimization/design technology co optimization). To that purpose the specifications definition and the link between all the stakeholders is mandatory.