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About the project
WP1 Project Management T1.1 Overall project coordination T1.2 Operational project management T1.3 Quality & innovation management, risk assessment T1.4 Research Data Management
WP2 Requirements T2.1 Definition of the requirements of the photonics technologies T2.2 Definition of the requirements of the photonics circuits T2.3 Definition of the requirements of the photonics applications T2.4 Sustainability improvement of the silicon photonics value chain
WP3 Photonics Technologies T3.1 SiPho Technology Development T3.2 Photonics substrates technology development T3.3 Integration of non-silicon materials at wafer level
WP4 Photonics Circuits T4.1 PIC100 circuits design T4.2 Path Finding to PIC200 circuits design T4.3 Photonics Tools T4.4 Photonics Packaging & Assembly T4.5 EIC Circuits Development
WP5 Photonics Applications T5.1 Demonstrators for Datacom & Hyperscaler T5.2 Demonstrators for AI Accelerator T5.3 Demonstrators for sensing T5.4 Telecom Demonstrator
WP6 Exploitation & Dissemination T6.1 External communication and dissemination of the results T6.2 Exploitation of STARLight results and business plans. T6.3 Education and Training
T3.3 Integration of non-silicon materials at wafer level
Objective
  • O3.4: Paving the way for heterogeneous integration on PIC100 & PIC200 for high-speed and high-efficiency modulation applications.
Description of work

This task aims to pave the way for heterogeneous integration on the silicon photonics platform of STM for high-speed and high-efficiency modulation application, including optical amplification. For III-V materials, direct-bonding and micro-transfer printing approaches are explored. Other materials with Pockels properties are studied (BTO, LNOI, and polymers), from process integration development to functional demonstrators, aiming for high-speed devices exhibiting bandwidth higher than 100 GHz.

Leader : CEA
Involved Partners : III-V LAB, IMEC, STM, LUMIPHASE